HAL NAND migration: List of applicable concepts ¶
This section provides information about the HAL NAND applicable architecture concepts.
Concepts for NAND ¶
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Concept |
Description |
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Split
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Removal and conversion of init structure to configuration structure |
New configuration structures have been introduced:
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The handle structure
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The init structure
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The
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Individual callback registration APIs replace global register and unregister functions |
The callback registration is now handled by specific functions for each NAND event. |
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The state machine has been reworked to ensure transitions of the peripheral functional states. |
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The HAL NAND functions were updated to return:
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All TypeDef parts of the HAL NAND driver have been removed and replaced by
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Const keywords have been added to non-modifiable pointers to ensure that either the pointer itself or the data it points to cannot be modified. This enhances code safety and readability, prevents unintended modifications, and renders code more robust and maintainable. |
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The
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Rename LL core drivers to stm32_ppp_core.h/.c to avoid confusion with user LL drivers. |
The core driver name has been changed from
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Add HAL PPP Services for Drivers with Handle to Retrieve Corresponding Peripheral Clock Frequency. |
HAL NAND provides new API to retrieve clock frequency
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Replace Finite Parameter Defines (Including PPP Instances) with Enum Types at HAL Levels. |
Convert finite parameters, (including instances) into enumerated types (enums) at the HAL level. This improves code readability, maintainability, and type safety. |
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Add HAL_PPP Prefix to All HAL Peripheral APIs (Defines, Macros, Types, and Functions). |
All HAL NAND functions start with
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Other HAL NAND changes ¶
|
Concept |
Consideration |
|---|---|
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Support ONFI (Open NAND Flash Interface) |
The NAND driver is ONFI compliant. ONFI is the default command interface. As a consequence :
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Merge 8 and 16 bits program and read APIs into a single program and read interfaces |
In HAL 1, there are two sets APIs depending on data width:
In HAL 2, a single API is provided by functionality to handle processes for 8-bit and 16-bit APIs. |
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Replace Ready/Busy interrupt handling with an internal status check sequence |
In HAL 1, three interrupts are generated on Ready/Busy signal:
In HAL 2, these interrupts are removed from the driver as the device status reads are handled internally within process APIs. |
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Make the NAND structures and defines available in HAL_NAND header file instead of fmc core header file. |
All HAL NAND public APIs and structures are available in
Improves API discoverability and decouples from fmc core (
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Provide timing parameters in time units (ns, ms), instead of clock cycles. |
Offers user-friendly units and simplifies configuration. |